COA Notes
Categories of machine instructions: data transfer, arithmetic, logical, control flow, and I/O instructions.
Introduction
A processor's instruction set contains every operation the hardware can perform. These instructions fall into distinct categories based on what they do. Understanding instruction types helps you see the full vocabulary available to a machine-language programmer (or compiler). Every program — no matter how complex — is ultimately built from these basic instruction categories.
Data Transfer Instructions
Move data between registers and memory without modifying it:
| Instruction | Example | Action |
|---|---|---|
| LOAD/LW | LOAD R1, [addr] | Memory → Register |
| STORE/SW | STORE R1, [addr] | Register → Memory |
| MOV/MOVE | MOV R1, R2 | Register → Register |
| PUSH | PUSH R1 | Register → Stack |
| POP | POP R1 | Stack → Register |
| EXCHANGE | XCHG R1, R2 | Swap two locations |
| LEA | LEA R1, [addr] | Load address (not data) |
Key insight: In RISC architectures (load/store), ONLY load and store access memory. All other operations work on registers. This simplifies hardware design enormously.
Arithmetic Instructions
Perform mathematical operations:
| Instruction | Example | Action |
|---|---|---|
| ADD | ADD R1, R2, R3 | R1 ← R2 + R3 |
| SUB | SUB R1, R2, R3 | R1 ← R2 - R3 |
| MUL | MUL R1, R2, R3 | R1 ← R2 × R3 |
| DIV | DIV R1, R2, R3 | R1 ← R2 ÷ R3 |
| INC | INC R1 | R1 ← R1 + 1 |
| DEC | DEC R1 | R1 ← R1 - 1 |
| NEG | NEG R1 | R1 ← -R1 (negate) |
| CMP | CMP R1, R2 | R1 - R2 (set flags, discard result) |
CMP (compare) is special — it performs subtraction but only updates flags, not the destination. This sets up condition codes for subsequent branch instructions.
Logical Instructions
Perform bitwise Boolean operations:
| Instruction | Example | Action |
|---|---|---|
| AND | AND R1, R2, R3 | Bitwise AND |
| OR | OR R1, R2, R3 | Bitwise OR |
| XOR | XOR R1, R2, R3 | Bitwise XOR |
| NOT | NOT R1 | Bitwise complement |
| TEST | TEST R1, R2 | AND (set flags, discard result) |
Common uses:
- AND with mask to clear bits
- OR with mask to set bits
- XOR to toggle or check equality
- TEST to check if specific bits are set
Shift and Rotate Instructions
| Instruction | Example | Action |
|---|---|---|
| SHL/LSL | SHL R1, 2 | Logical shift left |
| SHR/LSR | SHR R1, 1 | Logical shift right |
| SAR/ASR | SAR R1, 1 | Arithmetic shift right |
| ROL | ROL R1, 1 | Rotate left |
| ROR | ROR R1, 1 | Rotate right |
Control Flow Instructions
Change the sequence of instruction execution:
Unconditional Branch
Conditional Branch
Function Call/Return
CALL function ; Push PC, jump to function
RET ; Pop PC, return to callerLoop Control (CISC)
I/O Instructions
Transfer data between processor and peripheral devices:
| Instruction | Example | Action |
|---|---|---|
| IN | IN R1, port | Read from I/O port to register |
| OUT | OUT port, R1 | Write from register to I/O port |
Note: In memory-mapped I/O systems (ARM, MIPS), regular LOAD/STORE serve as I/O instructions — no separate I/O instructions exist.
System/Privileged Instructions
Control processor state and operating system functions:
| Instruction | Purpose |
|---|---|
| HALT/HLT | Stop processor execution |
| NOP | No operation (useful for timing, alignment) |
| INT/SWI | Software interrupt (system call) |
| IRET | Return from interrupt |
| CLI/STI | Clear/Set interrupt flag |
| LIDT/LGDT | Load interrupt/global descriptor table |
These are typically restricted to kernel/supervisor mode for security.
Instruction Mix
Not all instruction types are used equally. Studies of real programs show:
| Category | Frequency (typical) |
|---|---|
| Data Transfer (LOAD/STORE/MOV) | 35-45% |
| Arithmetic | 15-20% |
| Control Flow (branches) | 15-25% |
| Logical/Shift | 10-15% |
| Other | 5-10% |
This means data movement dominates — which is why register count and cache design are so important.
RISC vs CISC Instruction Philosophies
RISC (Reduced Instruction Set)
- Fewer, simpler instructions
- All instructions same length, same execution time
- Only LOAD/STORE access memory
- Compiler does the heavy lifting of instruction selection
CISC (Complex Instruction Set)
- Many specialized instructions (string copy, polynomial evaluate, etc.)
- Variable-length instructions
- Memory operands in arithmetic instructions
- Hardware does more, compiler does less
Key Takeaways
- Instructions fall into categories: data transfer, arithmetic, logical, shift, control flow, I/O, system
- Data transfer instructions are the most frequently executed (~40% of all instructions)
- Control flow instructions direct program execution — conditional branches enable decisions and loops
- CMP and TEST set flags without saving results, preparing for conditional branches
- RISC architectures keep instructions simple; CISC adds complex specialized instructions
- Arithmetic and logical instructions modify data; transfer instructions move data unchanged
- Understanding instruction frequency guides hardware optimization priorities
Exam Focus
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