COA Notes
CPU performance metrics: clock speed, CPI, MIPS, FLOPS, benchmarks, and Amdahl
Introduction
"This CPU is faster" — but what does "faster" actually mean? Does it complete a single task in less time? Does it handle more tasks per second? Can it crunch more numbers? Performance measurement in computer architecture is surprisingly nuanced. A CPU might be "faster" by one metric but "slower" by another. Understanding performance metrics helps you evaluate systems objectively and identify real bottlenecks.
Execution Time vs Throughput
Two fundamental performance perspectives:
Execution Time (Latency): How long does it take to complete ONE task?
- Important for: interactive applications, real-time systems
- Example: "This CPU renders my video in 10 minutes instead of 15"
Throughput (Bandwidth): How many tasks can be completed per unit time?
- Important for: servers, batch processing
- Example: "This server handles 10,000 web requests per second"
Sometimes improving one hurts the other. Adding more cores improves throughput but doesn't reduce single-task latency.
The CPU Performance Equation
The most fundamental equation in computer architecture:
Or equivalently:
This tells us three ways to make a CPU faster:
- Reduce instruction count: Better algorithms, better compiler
- Reduce CPI: Better microarchitecture (pipeline, cache)
- Reduce cycle time (increase clock rate): Better circuit design
Clock Rate (Clock Speed)
- Measured in GHz (billions of cycles per second)
- Modern desktop CPUs: 3-5 GHz
- Higher clock = shorter cycle time = faster per-cycle operations
- But higher clock ≠ always faster (if CPI increases)
CPI (Cycles Per Instruction)
- Average number of clock cycles needed per instruction
- Different instructions take different cycles:
- Register ADD: 1 cycle
- Memory load (cache hit): 3-4 cycles
- Memory load (cache miss): 100+ cycles
- Floating-point divide: 20-40 cycles
- Average CPI depends on instruction mix of the program
Instruction Count
- Total instructions executed (dynamic count, not static program size)
- Depends on ISA and compiler
- CISC: fewer instructions but higher CPI
- RISC: more instructions but lower CPI
MIPS (Million Instructions Per Second)
Problems with MIPS
- Not comparable across ISAs: A CISC instruction does more work than a RISC instruction
- Varies by program: Different programs have different instruction mixes
- Can be misleading: Adding NOPs increases MIPS without improving real performance!
MFLOPS/GFLOPS/TFLOPS (Floating-Point Operations Per Second)
- MFLOPS: 10⁶ FLOPS (megaFLOPS)
- GFLOPS: 10⁹ FLOPS (gigaFLOPS)
- TFLOPS: 10¹² FLOPS (teraFLOPS)
- PFLOPS: 10¹⁵ FLOPS (petaFLOPS)
More meaningful for scientific computing because it measures actual computational work. Modern GPUs achieve tens of TFLOPS for AI workloads.
Amdahl's Law
The fundamental law of performance optimization: The speedup from improving one part of a system is limited by how much time that part is actually used.
Where:
- f = fraction of execution time that CAN be improved
- S = speedup factor of the improved portion
Example
If 80% of a program is parallelizable and you have 4 cores:
Even with infinite cores:
Key insight: The serial portion becomes the bottleneck. Even if you speed up 90% of the program infinitely, you only get a 10× speedup at best.
Benchmarks
Why Benchmarks?
Single metrics (MIPS, clock speed) are unreliable. Benchmarks run real programs and measure actual performance.
SPEC CPU
- The industry standard for CPU performance
- SPECint: Integer workloads (compilers, chess, compression)
- SPECfp: Floating-point workloads (physics simulation, rendering)
- Scores normalized to a reference machine
Other Benchmarks
- Geekbench: Consumer single-core and multi-core scores
- Cinebench: 3D rendering performance
- LINPACK: Dense linear algebra (used for TOP500 supercomputer ranking)
- MLPerf: Machine learning training and inference speed
Speedup
A speedup of 2× means the new system is twice as fast (takes half the time).
Power and Energy
Modern performance must consider power:
Thermal Design Power (TDP)
Maximum sustained power consumption. Higher performance usually requires more power.
Performance per Watt
Critical for data centers (electricity cost) and mobile devices (battery life).
Dynamic Power Equation
- α: activity factor (fraction of transistors switching)
- C: capacitance (related to transistor count and size)
- V: supply voltage
- f: clock frequency
Reducing voltage dramatically reduces power (squared relationship).
The Iron Law Expanded
| Factor | Affected by |
|---|---|
| Instructions/Program | ISA, Compiler, Algorithm |
| Cycles/Instruction (CPI) | Microarchitecture (pipeline, cache, branch prediction) |
| Seconds/Cycle (1/Clock) | Circuit design, fabrication technology |
Key Takeaways
- CPU Time = Instructions × CPI × Cycle Time — the fundamental performance equation
- Clock speed alone doesn't determine performance — CPI and instruction count matter equally
- MIPS is problematic for comparison across different architectures
- FLOPS is more meaningful for scientific/numerical workloads
- Amdahl's Law: speedup is limited by the non-improved (serial) fraction
- Benchmarks (SPEC) running real programs give the most honest performance picture
- Modern systems must balance performance against power consumption
- There's no single "best" metric — the right measure depends on your workload
Exam Focus
Revise definitions, diagrams, examples, and short-answer points for Performance Metrics.
Interview Use
Prepare one clear explanation, one practical example, and one common mistake for this Computer Organization & Architecture topic.
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