Programmed I/O

Introduction

Programmed I/O is the simplest and most fundamental method of data transfer between the CPU and peripheral devices. In this approach, the CPU is completely in charge of every aspect of the transfer — it initiates the operation, repeatedly checks the device status (polling), waits until the device is ready, and then transfers data one unit at a time. While conceptually straightforward and easy to implement, programmed I/O has a critical drawback: the CPU is trapped in a busy-wait loop, unable to do any useful computation while waiting for a slow peripheral device.

Understanding programmed I/O is essential because it establishes the baseline against which all more efficient I/O methods (interrupt-driven I/O, DMA) are measured. Every improvement in I/O handling is fundamentally about solving the problem that programmed I/O makes painfully visible: the enormous speed mismatch between the CPU and peripheral devices.

How Programmed I/O Works

The CPU communicates with devices through special registers mapped to specific addresses. Each device typically exposes three registers to the CPU:

Status Register: Contains flags indicating the device's current state — ready, busy, error, data available, etc. The CPU reads this register to determine whether the device is ready for the next operation.

Data Register: The buffer through which data is transferred. For input, the device places received data here; for output, the CPU writes data here for the device to process.

Control/Command Register: The CPU writes commands here to instruct the device what to do — start reading, start writing, reset, etc.

Input Operation (Reading from Device)

Output Operation (Writing to Device)

The Busy-Wait Problem

The polling loop is where programmed I/O reveals its fundamental inefficiency. During the busy-wait, the CPU is executing instructions — checking the status register, comparing, branching back — but none of this work is productive. The CPU is essentially sitting idle, waiting for a mechanical or electronic device that operates thousands to millions of times slower.

Quantifying the Waste

Consider printing a document character by character:

• CPU clock: 3 GHz (3 × 10⁹ cycles/second)
• Printer speed: 1000 characters/second (1 character per millisecond)
• Polling loop iterations per character: approximately 3 × 10⁶ cycles wasted
• For a 10,000-character document: 3 × 10¹⁰ cycles wasted — equivalent to 10 seconds of full CPU computation

For a disk drive:

• Average disk access time: 8 milliseconds
• CPU cycles wasted per disk operation: 24 million cycles
• Those 24 million cycles could have executed 12 million useful instructions

The situation becomes catastrophic with multiple devices. If the CPU must poll a keyboard, a disk, a network card, and a printer, it spends virtually all its time in polling loops with no time for actual computation.

I/O Addressing Methods

Programmed I/O uses one of two addressing schemes to access device registers:

Memory-Mapped I/O

Device registers are assigned addresses in the regular memory address space. The CPU uses the same LOAD and STORE instructions it uses for memory access. For example, a keyboard status register might be at address 0xFFFF0000. Reading that address reads the device status — no special instructions needed.

Advantages: No special instructions required, any memory instruction works with devices, pointer-based programming works naturally.

Disadvantages: Consumes memory address space, caching must be disabled for device addresses, cannot distinguish device access from memory access in the instruction.

Isolated I/O (Port-Mapped I/O)

Device registers have their own separate address space accessed by special I/O instructions (IN and OUT on x86). The device address bus is separate from the memory address bus.

Advantages: Does not consume memory address space, clearly distinguishes I/O from memory operations in the code, I/O space can be smaller (16-bit addressing sufficient).

Disadvantages: Requires special instructions (limits compiler optimization), separate I/O bus adds hardware complexity.

x86 processors support both methods: legacy devices use port I/O (IN/OUT instructions), while modern devices use memory-mapped I/O (PCIe BAR regions).

Condition Checking vs. Blind Transfer

There are two variations of programmed I/O:

Conditional (with status check): The CPU checks the status register before each transfer, waiting for the device to be ready. This is the standard approach and handles devices operating at variable speeds.

Unconditional (blind transfer): The CPU assumes the device is always ready and transfers data without checking status. This works only for devices with guaranteed timing (like writing to a memory-mapped display buffer or a hardware timer register). It is simpler but dangerous if the device is not ready — data can be lost.

Practical Applications

Despite its inefficiency, programmed I/O remains useful in specific scenarios:

Embedded systems with single tasks: A microcontroller dedicated to reading one sensor has nothing else to do while waiting. The busy-wait costs nothing because there is no other productive work.

Very fast devices: If the device is always ready (like a register in an FPGA or a status LED), the polling loop executes zero or one iteration. The overhead is negligible.

Real-time systems: The deterministic timing of polling (you know exactly when you will check the device) can be advantageous in hard real-time systems where interrupt latency variation is unacceptable.

Boot sequences: During system startup, before the interrupt system is configured, the BIOS uses programmed I/O to communicate with keyboard, display, and storage devices.

Debugging: When interrupt handlers themselves are buggy, programmed I/O provides a fallback for diagnostic output.

Comparison with Other Methods

Key Takeaways

1. In programmed I/O, the CPU controls every aspect of data transfer — issuing commands, polling status, and moving data
2. The polling (busy-wait) loop continuously checks the device status register until the device is ready
3. The CPU is completely occupied during the transfer and cannot perform any other useful work
4. For slow devices, millions of CPU cycles are wasted per data unit transferred
5. Memory-mapped I/O uses regular memory addresses for device registers; port-mapped I/O uses separate I/O instructions
6. Programmed I/O remains appropriate for simple embedded systems, boot sequences, and devices that respond immediately
7. The inefficiency of programmed I/O directly motivated the development of interrupt-driven I/O and DMA