I/O Interface

Introduction

The CPU and I/O devices speak different languages — the CPU works with parallel binary data at nanosecond speeds, while devices like keyboards operate with serial signals at millisecond speeds, and disk drives work with analog signals and mechanical delays. The I/O interface (also called a device controller or I/O adapter) sits between them, translating between these different worlds — handling speed matching, data format conversion, signal level adaptation, and communication protocols.

Why I/O Interfaces Are Needed

1. Speed mismatch: CPU operates at GHz; keyboard at ~10 characters/second; disk at ~100 MB/s
2. Data format differences: CPU uses 32/64-bit parallel; devices may use serial, analog, or custom formats
3. Signal level differences: CPU logic levels vs device-specific voltages
4. Synchronization: CPU is synchronous (clock-driven); many devices are asynchronous
5. Error handling: Devices can produce errors that need detection and reporting

I/O Interface Block Diagram

Interface Registers

Every I/O interface has these key registers accessible by the CPU:

Data Register

• Holds data being transferred between CPU and device
• Input: Device writes data here; CPU reads it
• Output: CPU writes data here; device reads it
• May be buffered (FIFO) to handle speed differences

Status Register

• Reports the current state of the device
• Bits indicate: device ready, busy, error, data available, transfer complete
• CPU reads this to check if it can interact with the device

Control Register

• CPU writes commands here to control the device
• Commands: start transfer, reset device, set mode, enable interrupts

Addressing I/O Interfaces

Memory-Mapped I/O

• I/O registers assigned addresses in the memory address space
• CPU accesses device registers using regular LOAD/STORE instructions
• Example: Writing to address 0xFF00 might send data to a display controller
• Advantage: No special instructions needed; full instruction set available for I/O
• Used by: ARM, MIPS, most modern architectures

Isolated I/O (Port-Mapped)

• Separate I/O address space from memory
• Special instructions: IN (read port), OUT (write port)
• Example: OUT 0x3F8, AL (send byte to serial port)
• Advantage: Memory address space fully available for RAM
• Used by: x86 architecture

Handshaking

What is Handshaking?

A synchronization protocol between CPU and device to ensure reliable data transfer. Since devices operate at different speeds, handshaking signals confirm "I'm ready" and "I've received it."

Source-Initiated Handshake

Destination-Initiated Handshake

Types of Data Transfer

Serial Interface

• Data transmitted one bit at a time
• Fewer wires but slower for bulk data
• Examples: UART, USB, SPI, I²C
• Common for: keyboards, mice, modems, sensors

Parallel Interface

• Multiple bits transmitted simultaneously
• More wires but faster for bulk data
• Examples: Traditional parallel port, internal buses (PCIe lanes)
• Being replaced by high-speed serial (ironically faster at modern frequencies)

Modern I/O Interface Examples

Key Takeaways

1. I/O interfaces bridge the gap between the fast, parallel CPU and diverse, slow devices
2. Every interface has data, status, and control registers accessible by the CPU
3. Handshaking protocols ensure reliable asynchronous communication
4. Memory-mapped I/O uses regular addresses; port-mapped uses special IN/OUT instructions
5. Interfaces handle speed matching, data conversion, and error detection
6. Modern interfaces are predominantly serial at high speeds (USB, PCIe)
7. The I/O interface design determines how efficiently the CPU can communicate with peripherals