Instruction Format

Introduction

Every machine instruction is just a binary pattern — a sequence of 0s and 1s that the CPU decodes to understand what operation to perform and on what data. The instruction format defines how those bits are organized into fields: which bits represent the operation code, which represent register numbers, which represent memory addresses or immediate values. Good instruction format design is a critical architectural decision that affects code density, decoding speed, and overall performance.

Instruction Fields

A typical instruction contains these fields:

Opcode (Operation Code)

• Specifies WHAT operation to perform (ADD, SUB, LOAD, BRANCH, etc.)
• Typically 4-8 bits (allowing 16-256 different instructions)
• Must be decoded by the control unit

Operand Fields

• Specify WHERE data comes from and WHERE results go
• Can represent: register numbers, memory addresses, immediate values
• The addressing mode (how to interpret the operand) may be encoded here or in the opcode

Number of Addresses

Three-Address Instructions

• Specifies: operation, two sources, one destination
• Most flexible — no implicit operands
• Larger instructions (more bits for three addresses)
• Examples: MIPS, ARM, RISC-V

Two-Address Instructions

• One operand is both source AND destination (overwritten)
• Shorter instructions than three-address
• May require extra MOV instructions to preserve values
• Example: x86 (traditional style)

One-Address Instructions (Accumulator)

• Uses an implicit accumulator register
• Very short instructions
• Requires explicit LOAD/STORE around every computation
• Example: Early computers (PDP-8)

Zero-Address Instructions (Stack)

• Operands implicitly on top of stack
• Shortest possible instructions
• Many PUSH/POP operations needed
• Example: Java bytecode, HP calculators

Fixed vs Variable Length Instructions

Fixed Length (RISC approach)

All instructions are the same size (typically 32 bits):

Advantages:

• Simple fetch (always read 4 bytes)
• Easy pipelining (instruction boundaries always at multiples of 4)
• Fast decode (fields always in same position)
• PC increment is constant (+4)

Disadvantages:

• Wasted bits for simple instructions
• Limited immediate value size
• Less compact code

Variable Length (CISC approach)

Instructions range from 1 to 15+ bytes:

Advantages:

• Compact code (common instructions short, rare ones longer)
• Large immediate values and addresses possible
• Rich addressing modes

Disadvantages:

• Complex fetch and decode (don't know length until partially decoded)
• Harder to pipeline (instruction boundaries unpredictable)
• More complex hardware

MIPS Instruction Formats (Classic RISC)

R-Type (Register)

Used for: register-register operations (ADD, SUB, AND, OR, SLT)

I-Type (Immediate)

Used for: immediate operations, loads, stores, branches

J-Type (Jump)

Used for: jumps (J, JAL)

Encoding Design Trade-offs

More opcode bits → more instructions but fewer operand bits

More register bits → more registers but fewer operation options

Larger immediate field → bigger constants but fewer other fields

The art of ISA design is balancing these constraints within a fixed instruction width.

Key Takeaways

1. Instruction format defines how bits are organized into opcode and operand fields
2. Three-address format (RISC) is most flexible; zero-address (stack) is most compact
3. Fixed-length instructions simplify fetch/decode and enable efficient pipelining
4. Variable-length instructions provide better code density but complicate hardware
5. RISC architectures use few, regular formats (R, I, J) for simplicity
6. CISC architectures use many complex formats for expressiveness
7. The number of bits allocated to each field is a critical design trade-off