Raspberry Pi Architecture

Introduction

The Raspberry Pi is a small, affordable single-board computer that has sold over 60 million units since 2012. For computer architecture students, it is a perfect case study — it contains a complete ARM-based System-on-Chip (SoC) with CPU, GPU, memory controller, and I/O all on one piece of silicon. Unlike studying abstract architectures from textbooks, with a Raspberry Pi you can actually touch the hardware, measure performance, and see architecture concepts come alive. Let's dissect what is inside this credit-card-sized computer.

System-on-Chip (SoC) Architecture

The heart of every Raspberry Pi is a Broadcom SoC. Let's look at the Pi 4's BCM2711:

What Makes an SoC Different from Desktop CPUs?

On a desktop, the CPU, GPU, memory controller, and I/O chips are separate components on a motherboard. In an SoC, everything is integrated on a single die:

Benefits of SoC integration: Lower power (shorter wires), smaller size, lower cost, less board complexity. Trade-off: Cannot upgrade individual components.

CPU: ARM Cortex-A72

The Pi 4 uses four Cortex-A72 cores running at 1.5 GHz (overclockable to 2+ GHz):

Core Microarchitecture

• Pipeline: 15 stages, out-of-order execution
• Dispatch width: 3 micro-ops per cycle (3-wide superscalar)
• Execution units: 2 ALU + 1 multiply/divide + 2 NEON/FP + 1 branch + 1 load + 1 store
• Reorder Buffer: 128 entries
• L1 I-cache: 48 KB, 3-way
• L1 D-cache: 32 KB, 2-way, 4-cycle latency
• L2 cache: 1 MB shared across all 4 cores, 16-way

Performance Context

At 1.5 GHz with CPI ≈ 1.5 for typical workloads:

This gives performance roughly equivalent to a 2010 laptop — impressive for a $35 board.

GPU: VideoCore VI

The VideoCore GPU is unique — it is actually the primary processor on the BCM chip (historically, the ARM cores were secondary). The GPU:

• Runs at 500 MHz
• Handles: 4K video decode (H.265), 3D graphics (OpenGL ES 3.1), display output
• Has its own instruction set (not ARM) — a specialized DSP-like architecture
• Boots before the ARM cores (GPU firmware loads the ARM kernel)

Unusual Boot Sequence

This is architecturally unusual — most systems have the CPU boot first.

Memory Architecture

LPDDR4 Memory System

The memory is soldered directly on the board (not in DIMM slots). The 32-bit bus width is half that of a desktop (64-bit), which limits memory bandwidth — this is the Pi's main performance bottleneck for memory-intensive workloads.

Memory Map

The BCM2711 uses memory-mapped I/O — peripheral registers appear as specific memory addresses:

When you write to GPIO address 0xFE200000, you are not writing to RAM — you are directly controlling hardware pins. This is how device drivers work at the lowest level.

GPIO (General Purpose Input/Output)

The 40-pin GPIO header is what makes the Pi special for learning:

How GPIO Works at the Register Level

Each GPIO pin is controlled by configuration registers:

• GPFSEL (Function Select): Sets pin as input, output, or alternate function (3 bits per pin)
• GPSET (Set): Writing 1 sets output HIGH
• GPCLR (Clear): Writing 1 sets output LOW
• GPLEV (Level): Read current pin state

Example — turning on an LED connected to GPIO17:

This is bare-metal hardware control — you are directly manipulating registers, the same way an OS kernel controls hardware.

I/O Subsystem

Available Interfaces

PCIe and USB 3.0

The Pi 4 introduced PCIe internally — the USB 3.0 controller (VL805) connects via a single PCIe Gen 2 lane. This means USB 3.0 and Ethernet no longer share bandwidth (unlike Pi 3 which routed everything through USB 2.0).

Power and Thermal Considerations

The Pi 4 consumes:

• Idle: ~3 W
• Load (4 cores + GPU): ~6-7 W
• Maximum (stress test): ~7.5 W

Compare to a desktop CPU at 65-125 W — the Pi uses 10-20× less power. This efficiency comes from:

1. ARM architecture (inherently power-efficient)
2. Lower clock speeds (1.5 vs 5+ GHz)
3. Smaller transistors on mobile-optimized process nodes
4. No discrete components (everything integrated)

Thermal throttling begins at 80°C — the CPU reduces frequency to stay within thermal limits. A heatsink or fan prevents this.

Educational Value

The Raspberry Pi demonstrates these architecture concepts hands-on:

• Memory-mapped I/O: GPIO register manipulation shows how hardware control actually works
• Cache effects: Measuring memory access patterns shows cache hit/miss behavior
• Pipeline effects: Benchmarking shows branch prediction impact
• Interrupts: GPIO interrupts demonstrate hardware interrupt handling
• DMA: Camera and audio use DMA for efficient data transfer
• Virtual memory: Linux on Pi uses full MMU with paging

Key Takeaways

1. An SoC integrates CPU, GPU, memory controller, and I/O on a single chip — reducing cost, size, and power
2. The ARM Cortex-A72 provides out-of-order superscalar execution at 1.5 GHz — server-class architecture at embedded power levels
3. Memory-mapped I/O means peripheral control is just reading/writing specific addresses — no special I/O instructions needed
4. GPIO demonstrates bare-metal hardware control at the register level — the foundation of embedded systems and OS kernel development
5. The unusual GPU-first boot sequence shows that architectural choices can be unconventional when driven by specific design goals (multimedia focus)
6. With 7W total power vs 100W+ for a desktop, the Pi demonstrates power-performance trade-offs in action