Basic Computer Structure

Introduction

At its heart, every computer — from a $5 microcontroller to a million-dollar server — follows the same basic structure. There's a processor that executes instructions, memory that stores data and programs, input/output devices that communicate with the world, and buses that connect everything together. This chapter gives you the complete picture of how these pieces fit together into a working system.

The Three Main Subsystems

A computer is built from three major subsystems:

1. Central Processing Unit (CPU)

The CPU is the brain — it fetches instructions from memory, decodes them, and executes them. Internally it contains:

• Arithmetic Logic Unit (ALU): Performs all computations
• Control Unit (CU): Directs and coordinates operations
• Registers: Small, ultra-fast storage for immediate data
• Program Counter: Tracks which instruction to execute next

2. Memory System

Memory holds the instructions (program) and the data being processed:

• Registers (inside CPU): Fastest, smallest (bytes)
• Cache: Fast SRAM near the CPU (KB to MB)
• Main Memory (RAM): Moderate speed, moderate size (GB)
• Secondary Storage: Slow but massive (TB) — SSDs, HDDs

3. Input/Output System

The I/O system handles communication with everything outside the CPU/memory:

• Input devices: Keyboard, mouse, sensors, network
• Output devices: Display, printer, speakers, network
• Storage devices: Actually function as both input and output

The System Bus

The bus is the shared communication highway connecting all components. It consists of three logical groups of wires:

Data Bus

• Carries actual data between components
• Bidirectional — data flows both ways
• Width determines how much data moves per transfer (32-bit, 64-bit)
• Wider data bus = more data per cycle = faster transfers

Address Bus

• Carries the memory address the CPU wants to access
• Unidirectional — CPU sends addresses out
• Width determines maximum addressable memory
• n-bit address bus → can address 2ⁿ memory locations
• 32-bit address bus → 4 GB addressable memory
• 64-bit address bus → 16 exabytes (theoretical)

Control Bus

• Carries command and timing signals
• Includes: Read/Write, Clock, Interrupt, Bus Request/Grant
• Coordinates who uses the bus and when
• Mixed directions depending on specific signals

How Data Flows Through the System

Let's trace what happens when the CPU needs to add two numbers from memory:

Step 1: Fetch instruction

• CPU places instruction address on the address bus
• CPU asserts "Memory Read" on the control bus
• Memory returns the instruction on the data bus
• CPU stores it in the Instruction Register

Step 2: Decode instruction

• Control unit interprets the instruction
• Determines: "ADD the contents of address X and address Y"

Step 3: Fetch operands

• CPU places address X on the address bus, reads first number
• CPU places address Y on the address bus, reads second number
• Both values stored in CPU registers

Step 4: Execute

• ALU receives both numbers
• ALU performs addition
• Result placed in a register

Step 5: Store result

• CPU places destination address on address bus
• CPU places result on data bus
• CPU asserts "Memory Write" on control bus
• Memory stores the result

Memory-Mapped vs I/O-Mapped Architecture

How does the CPU communicate with I/O devices?

Memory-Mapped I/O

• I/O devices are assigned memory addresses
• The same instructions that access memory also access I/O
• Advantage: No special I/O instructions needed; full instruction set works with devices
• Disadvantage: Some address space is "stolen" from memory
• Used in: ARM, MIPS, most modern systems

I/O-Mapped (Port-Mapped) I/O

• Separate address space for I/O devices
• Special instructions (IN, OUT) for device access
• Advantage: Full memory address space preserved
• Disadvantage: Limited instruction set for I/O
• Used in: x86 (Intel) architecture

Word Size and Its Impact

The word size is the natural data unit of the processor — typically matching the register width and data bus width:

Word size affects:

• How much data the CPU processes per operation
• The range of integers that can be handled natively
• The maximum addressable memory
• The width of internal data paths

Stored Program Concept in Action

The basic computer structure implements the stored-program concept:

1. Both programs and data reside in the same main memory
2. The CPU fetches instructions sequentially (unless a branch occurs)
3. Instructions are encoded as binary patterns, just like data
4. The program counter keeps track of execution progress

This means the computer is truly general-purpose — change the program in memory, and the same hardware does completely different tasks.

Modern Enhancements to Basic Structure

While the fundamental structure remains the same, modern computers add:

• Multiple buses: Separate front-side bus, memory bus, I/O bus for parallel transfers
• DMA controllers: Allow I/O devices to access memory without CPU involvement
• Bus bridges: Connect buses of different speeds
• Interrupt controllers: Manage hardware interrupts efficiently
• Cache hierarchy: Multiple levels of cache between CPU and main memory

Key Takeaways

1. Every computer has three subsystems: CPU, Memory, and I/O, connected by buses
2. The system bus has three components: data bus, address bus, and control bus
3. Address bus width determines maximum addressable memory (2ⁿ locations)
4. Data bus width determines transfer bandwidth
5. Memory-mapped I/O treats devices as memory addresses; port-mapped uses special instructions
6. Word size affects processing capability, memory capacity, and data throughput
7. The stored-program concept makes computers general-purpose and reprogrammable