COA Notes
Sign-magnitude, one
Introduction
Computers need to represent negative numbers, but hardware only deals with 0s and 1s — there's no minus sign in binary! So how do we encode the concept of "negative" using only binary digits? Over the decades, engineers developed several clever approaches. The most important one — two's complement — is used in virtually every modern processor, and understanding why requires knowing the alternatives and their limitations.
The Problem
With n bits, we can represent 2ⁿ different values. For unsigned numbers, that gives us 0 to 2ⁿ-1. But if we want to include negative numbers, we need to "sacrifice" some of those combinations to represent negative values. The question is: how do we decide which bit patterns represent negative numbers?
Method 1: Sign-Magnitude
Concept
The simplest approach: use the leftmost bit as a sign bit (0=positive, 1=negative) and the remaining bits as the magnitude (absolute value).
Format for n-bit numbers
Example (8 bits)
Range
For n bits: -(2ⁿ⁻¹ - 1) to +(2ⁿ⁻¹ - 1) For 8 bits: -127 to +127
Problems with Sign-Magnitude
- Two representations of zero: +0 (00000000) and -0 (10000000) — confusing and wastes a code
- Complex arithmetic: Adding a positive and negative number requires comparing magnitudes and choosing the sign — this needs extra hardware
- Slower computation: The sign must be handled separately from the magnitude
Where It's Still Used
- IEEE 754 floating-point numbers use sign-magnitude for the significand
- Some older mainframe computers (IBM 7090)
Method 2: One's Complement
Concept
To negate a number, flip (complement) all its bits. The sign bit is still the MSB (0=positive, 1=negative).
How to Negate
Simply invert every bit: 0→1, 1→0
Example (8 bits)
Verification
Range
Same as sign-magnitude: -(2ⁿ⁻¹ - 1) to +(2ⁿ⁻¹ - 1) For 8 bits: -127 to +127
Addition in One's Complement
Add normally, but if there's a carry out of the MSB, add it back to the LSB (end-around carry).
Problems with One's Complement
- Still has two zeros: +0 (00000000) and -0 (11111111)
- End-around carry complicates the adder circuit
- Not used in modern processors
Method 3: Two's Complement (The Standard)
Concept
To negate a number: flip all bits AND add 1. This elegant trick eliminates all the problems of the previous methods.
How to Negate
- Invert all bits (one's complement)
- Add 1
Example (8 bits)
Shortcut Method
Starting from the right, keep all bits up to and including the first '1', then flip all remaining bits:
Range
For n bits: -2ⁿ⁻¹ to +(2ⁿ⁻¹ - 1) For 8 bits: -128 to +127
Notice: one extra negative number compared to the other methods! -128 exists but +128 does not.
Why Two's Complement is Superior
1. Only one zero: 00000000 represents zero. If you negate it: flip → 11111111, add 1 → 100000000, the carry falls off (in 8 bits) → 00000000. Just one zero!
2. Simple addition: Add numbers exactly like unsigned — no special handling needed.
3. Simple subtraction: A-B = A + two's_complement(B). No separate subtractor needed!
4. One adder circuit does everything: The same hardware handles positive, negative, addition, and subtraction.
Interpreting Two's Complement Numbers
For an n-bit two's complement number, the MSB has a weight of -2ⁿ⁻¹:
Comparison Table
| Feature | Sign-Magnitude | One's Complement | Two's Complement |
|---|---|---|---|
| Negation method | Flip sign bit | Flip all bits | Flip all bits + 1 |
| Zero representations | Two (+0, -0) | Two (+0, -0) | One (only +0) |
| Range (8-bit) | -127 to +127 | -127 to +127 | -128 to +127 |
| Addition | Complex | End-around carry | Simple (same as unsigned) |
| Hardware complexity | High | Medium | Low |
| Modern usage | Floating-point sign | Historical | Universal standard |
Sign Extension
When you need to represent a number in more bits (e.g., moving an 8-bit value into a 16-bit register), you perform sign extension — copy the sign bit into all the new upper positions:
| +25 in 8 bits | 00011001 |
| +25 in 16 bits | 0000000000011001 (extend with 0s) |
| -25 in 8 bits | 11100111 |
| -25 in 16 bits | 1111111111100111 (extend with 1s) |
The value is preserved because extending the sign bit doesn't change the numerical value in two's complement.
Overflow Detection
In two's complement addition, overflow occurs when:
- Two positive numbers produce a negative result (positive overflow)
- Two negative numbers produce a positive result (negative overflow)
Simple rule: If carry into MSB ≠ carry out of MSB, overflow has occurred.
Key Takeaways
- Sign-magnitude is intuitive but has two zeros and needs complex addition hardware
- One's complement simplifies negation but still has two zeros and needs end-around carry
- Two's complement is the universal standard — one zero, simple addition, and the same adder works for both signed and unsigned
- In two's complement: negate by flipping all bits and adding 1
- The MSB acts as the sign bit: 0=positive, 1=negative
- Two's complement gives one extra negative value (e.g., -128 to +127 for 8 bits)
- Sign extension preserves the value when expanding to more bits
Exam Focus
Revise definitions, diagrams, examples, and short-answer points for Signed Number Representation.
Interview Use
Prepare one clear explanation, one practical example, and one common mistake for this Computer Organization & Architecture topic.
Search Terms
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